Power converter is almost an indispensable part for various electronic apparatus. Specifically, in an AC-to-DC converter, for electronic apparatus requesting large power, the power consumption as demanded possibly exceeds the rating, thereby having potentially interference upon other electronic apparatus. Therefore, power factor correction may be critical to electronic apparatus, since it may achieve functions of energy saving or power consumption reduction and efficiently reduce harmonic distortion occurred resulting in power contamination. The power factor reflects a relationship between an effective power and a total power consumption (i.e., apparent load power), and specifically the ratio of the effective power to the total power consumption. In essence, the greater the power factor is, the higher the power is effectively used.
In a conventional power factor corrector, boost converter and pulse width modulation (PWM) are used to obtain a larger power factor. FIG. 1 shows a simplified diagram of a typical power factor corrector 10, in addition to a bridge rectifier 12 for converting an alternating current (AC) input voltage Vac to a line voltage Vin coupled to an inductor L1 to generate a line current IL to further charge a boost capacitor CO so as to generate an output voltage VO, which comprises a PWM switch 14 connected between the inductor L1 and ground GND to switch the line current IL to flow to the boost capacitor CO or ground GND, and a control circuit 16 provides a PWM signal based on the line voltage Vin and the output voltage VO to switch the PWM switch 14. FIG. 2 shows the schematic waveforms of the AC input voltage Vac, the line voltage Vin, the AC input current Iac, and the line current IL obtained from the power factor corrector 10 shown in FIG. 1 using constant on-time modulation, designated with numerals 20, 22, 24 and 26, respectively. When the line voltage Vin is lower than a threshold Vt, due to the constant on-time of the PWM signal, there is not enough time period to draw sufficient energy from the input capacitor Cin. Accordingly, during the time period of from t1 to t2, the line current IL is maintained constant, and the waveforms 22 and 26 of the line voltage Vin and the line current IL are not identical. As a result, the total harmonic distortion of the system is serious.
Alternatively, multiplier technique is generally employed in current power factor correctors to achieve power factor correction and harmonic distortion reduction. FIG. 3 shows a conventional circuit using multiplier technique for the power factor corrector 10 of FIG. 1. A voltage V1 is generated by dividing the line voltage Vin by a voltage divider consisting of resistors R1 and R2 for one input of a multiplier 1604 in the control circuit 16. The output voltage VO is also divided by a voltage divider consisting of resistors R3 and R4 to generate a voltage V2 for an error amplifier 1602 to compare with a reference voltage Vref1 to thereby generate an error signal VEA for another input of the multiplier 1604. Accordingly, the multiplier 1604 generates a reference voltage Vref2 for a comparator 1606. During the PWM switch 14 is on, the line current IL flows through a sense resistor RSENSE, and a sense voltage VS is generated accordingly. The comparator 1606 compares the sense voltage VS with the reference voltage Vref2 to generate an output connected to the reset input R of an RS latch 1610. As the line current IL increases, the sense voltage VS also increases. When the sense voltage VS is higher than the reference voltage Vref2 the RS latch 1610 generates an output Q to turn off the PWM switch 14 by a driver 1612. Accordingly, the line current IL is redirected through a diode D1 to charge the boost capacitor CO. When the line current IL decreases to zero, a zero current detector 1608 generates a signal to the set input S of the RS latch 1610 and therefore turns on the PWM switch 14.
Although the power factor corrector 10 may achieve good power factor and output voltage regulation by use of the multiplier 1604, due to the nonlinearity of the multiplier 1604, the overall architecture of the power factor corrector 10 becomes more complicated.
Therefore, it is desired a power factor corrector and method thereof that avoid using multiplier to achieve power factor correction and output voltage regulation, and reduces harmonic distortion.